Logic Gates and Logic Circuits — common mistakes

When simplifying Boolean expressions, write down which law you are using at each step. This makes your working clear to the examiner and helps you avoid mistakes. For example: $A + A \cdot B = A \cdot 1 + A \cdot B = A \cdot (1+B) = A \cdot 1 = A$ (using Identity, Distributive, Annulment laws).

They are called universal because any other logic gate (AND, OR, NOT, XOR) can be created by combining only NAND gates, or only NOR gates. For example, a NOT gate can be made by connecting both inputs of a NAND gate together. This is very efficient for manufacturing, as factories only need to produce one type of gate.

An OR gate gives a TRUE (1) output if one OR both inputs are TRUE. An XOR (Exclusive OR) gate gives a TRUE output only if the inputs are different (one is TRUE and the other is FALSE). If both inputs are TRUE, an XOR gate gives a FALSE (0) output, whereas an OR gate would give a TRUE (1) output.

This comes with practice. A good strategy is to first look for opportunities to apply De Morgan's laws to break up negated brackets. Then, expand any remaining brackets using the distributive law. After that, look for common patterns like $A + \neg{A} = 1$, $A \cdot A = A$, or opportunities to factor out common variables. Always aim to reduce the number of terms or variables.

Yes, you must be able to recognise and draw the standard IEC 60617-12 symbols for all the gates (the rectangular shapes). While older, distinctively shaped symbols (like the D-shape for AND) are sometimes seen, the IEC standard is what Cambridge International specifies and expects in exam answers.